Vikram Sharma Mailthody | Sr Research Scientist
NVIDIA
Dr. Vikram Sharma Mailthody is Senior Research Scientist at NVIDIA Research. He is one of the core architects of NVIDIA Dynamo - distributed inference at scale product and co-leads Storage-Next initiative. His work focuses on solving foundational systems-level challenges in emerging data center workloads, with an emphasis on scalable GPU memory and storage system architectures.
Appearances:
Future of Memory and Storage - Day 1 @ 10:35
Storage ecosystem for emerging AI applications
Emerging AI applications cover a broad spectrum of usage models, each with its own characteristic interaction with storage. The trend toward having a low drive to GPU ratio in compute nodes is pushing storage out of the compute rack and into nearby storage servers. Storage servers are relied upon to deliver capacity, bandwidth, IOPs, and serviceability. What's the right storage architecture? How many different kinds of storage servers do we need? Is there an opportunity for convergence? This talk will frame and address these questions that the broader community is working through.
Future of Memory and Storage - Day 1 @ 16:30
Future AI Inference Architectures: Memory-Centric Systems and Emerging Data Center Paradigms
AI infrastructure is shifting from training-heavy, compute-bound systems to inference-dominated deployments constrained by memory bandwidth, capacity, data movement, and power. As model weights, embeddings, and KV caches expand, architectural innovation is moving beyond traditional GPU scaling toward wafer-scale systems, memory-first dataflow accelerators, chiplet-based inference ASICs, and inference-specialized designs.
Future of Memory and Storage - Day 3 @ 10:10
When Flash Becomes Memory: Rethinking the Five-Minute Rule for AI Infrastructure
In 1987, Jim Gray’s Five-Minute Rule provided a simple economic guideline for deciding when data should reside in DRAM versus storage. Revisited multiple times over four decades, the break-even interval consistently remained on the order of minutes, reinforcing flash as a secondary storage tier. This talk reexamines the rule from first principles in the AI era. We introduce a feasibility-aware framework that integrates host processor cost, DRAM bandwidth and capacity, device-level NAND timing, channel parallelism, and realistic SSD IOPS/$ scaling. We show that when GPU-centric hosts are paired with Storage-Next SSDs delivering 50M+ small-block IOPS, the DRAM↔flash caching threshold collapses from minutes to seconds.This shift promotes NAND flash from a passive capacity layer to an active extension tier of memory, with GPUs emerging as high-throughput I/O engines. We will present analytical insights, device-level modeling results, and system-level implications for AI infrastructure, including vector databases, recommender systems, and large-scale inference. The result is a new provisioning framework that redefines memory-storage balance for modern AI workloads.
Future of Memory and Storage - Day 3 @ 11:00
NVIDIA Special Session - Balancing Memory and Storage to Operate AI Factories and Agents at Scale
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