ALEX TECHANG TSENG | CEO
IMSolution Co., Ltd.
Alex TeChang Tseng has been working in semiconductor memory industry for 25 years. His working experience includes BSIM device modeling, DRAM/NOR/NAND Flash Memory circuit design and testing field, and also NAND Flash controller production development. He published 1st NAND Flash memory book in traditional Chinese (ISBN：986817838X). He was SSD Association VP Taiwan in 2013-2014. He founded IMSolutin in 2015 and shipped millions of DRAM/SSD products to enterprise customers. He also contributes several patents to NOR Flash/NAND Flash/3D NAND Flash/3D DRAM.
Appearances:
Future of Memory and Storage - Day 2 @ 08:35
A Novel 3D Cell Array Architecture for Capacitor less DRAM
A novel three-dimensional (3D) capacitor-less dynamic random-access memory (1T-DRAM) array is proposed as a high-density and high-performance memory solution. The device incorporates a double-gate and stacked-channel architecture to realize a 3D 1T-DRAM array. This Paper has been accepted by IEEE transaction of Electron Device and will be published in 2026. The major advantage is listed as below:
- Saving Power Consumption: Refresh time is dramatically increased from 32ms(DDR5)/64ms(DDR4) to 2,900ms at 85℃. DRAM refresh power consumption can be improved 10X or higher level.
- Higher bandwidth: Refresh operation will interrupt regular access from DRAM. Since refresh time is increased to 2,900ms then random access bandwidth can be maximized.
- Cost of DRAM memory chip: This research can replace 1T-1C DRAM array with 3D 1T-DRAM array. With supporting from 3D NAND fabrication technology, 5-10X cost saving can be achieved compared with 1Z or 1-alpha DRAM technology.
- Maximum DRAM density in one chip/package: Currently max single Die DRAM IC is ~32Gb and it is very difficult to increase by 1T-1C DRAM structure. This 3D DRAM technology can achieve 128Gb~512Gb with multiple layers.
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