Vijaya Rana | Principal Engineer, Reliability Engineering
Sandisk
Vijaya Rana is a Reliability Engineer with experience spanning the semiconductor, consumer electronics, and memory technology sectors. She has experience in reliability engineering and analysis, as well as material characterization for complex hardware systems. Her work focuses on reliability analysis, including lifetime modeling, failure rate estimation, and field reliability projections. Vijaya holds a Master's in Nanotechnology from University of Pennsyvalnia.
Appearances:
Future of Memory and Storage - Day 1 @ 09:50
Sample Estimation for Reliability Demonstration Test using Gam-ma distribution with Kerman neutral prior
Chi-Square methodology has traditionally been widely used in the microelectronics industry for planning demonstration tests. While the Chi-square distribution is suitable for sample estimation when product reliability is unknown, it tends to significantly overestimate failure rate projections for products with known reliability characteristics. This often results in over-engineering of products or establishing substantially higher reliability targets. This paper proposes the use of Gamma distribution with a Kerman neutral prior for Reliability Demonstration Test (RDT) planning, particularly for products with existing prior information such as prequalification test data, component level reliability data et al. This distribution offers a more accurate and statistically appropriate approach, aligning better with point estimates and reliability assessments when using Maximum Likelihood Estimation. Utilizing this methodology in SSD sample planning helps in achieving reliability targets, either by using smaller sample sizes or by reducing the reliability test durations. This can help meet reliability objectives at a lower cost without compromising product quality and reliability and ad
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