Shachi Agarwal | Staff Engineer
Qualcomm

Shachi Agarwal, Staff Engineer, Qualcomm

Shachi Agarwal is a Staff Software Engineer at Qualcomm with over a decade of experience in embedded systems and storage technologies, including UFS, eMMC/SD, NOR/NAND.
She specializes in low-level driver development, system bring-up, storage tools, and performance optimization.
Her work focuses on advancing storage solutions across platforms, improving reliability, and resolving complex storage issues.

Appearances:



Future of Memory and Storage - Day 3 @ 10:05

A Compatibility‑First Approach to HS‑LSS: Faster UFS Boot Without Ecosystem Disruption

High Speed Link Startup Sequence (HS‑LSS) is an emerging UFS capability that reduces storage bring‑up latency and can improve end‑to‑end boot KPIs. Ecosystem readiness varies, so SoCs must support both HS‑LSS and legacy LS‑LSS during a multi‑generation transition to maintain compatibility. This presentation describes Qualcomm’s production enablement of HS‑LSS with deterministic early‑boot selection across mixed UFS device configurations. Because devices may power up expecting HS‑LSS or LS‑LSS depending on hardware configuration, the host must select the correct startup sequence early—before any stage that depends on storage access. Our architecture makes this choice OEM‑selectable while reusing existing boot‑configuration mechanisms (no dedicated GPIO and no one‑time fuse/SKU lock‑in). Results demonstrate measurable improvements in time‑to‑UFS‑ready and boot-path determinism while maintaining backward compatibility, with a clear path to retire LS‑LSS support as adoption matures. Since link startup can occur multiple times (cold boot, warm reboot, recovery), the startup-time gains can compound linearly over a platform’s operational lifetime.

last published: 19/May/26 18:25 GMT

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