Nhan Do | VP of Engineering
SST, a Microchip Technology Company

Future of Memory and Storage - Day 3 @ 14:40

Scaling SST SuperFlash for Analog Compute-in-Memory

Inference devices for the edge with low power, high performance, and small footprint are in high demand.  Recent advances in analog compute-in-memory (a-CIM) to solve the data communication bottlenecks in neural network had re-ignited significant research interest in using various types of non-volatile memory for a-CIM. SST’s split-gate flash (ESF) had been successfully developed and deployed in numerous stand-alone and embedded NOR products such as micro-controllers (MCU), programmable logic devices, internet of things, smart and secure cards.  In this work, the implementation of a 2Mb ESF neuromorphic memory array as an analog vector matrix multiplier (VMM) will be discussed.  The silicon result of the VMM fabricated using an ESF 28nn process will be presented along with design concepts and testing techniques.   Successful implementations of ESF neuromorphic memory in customers products will be showcased.

Nhan Do, VP of Engineering, SST, a Microchip Technology Company

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Nhan Do / Scaling SST SuperFlash for Analog Compute-in-Memory

Nhan Do, VP of Engineering,
SST, a Microchip Technology Company

Nhan Do received his bachelors of arts in Physics and Mathematics from the University of California at Berkeley and his Ph.D. in Material Science and Engineering from the University of California at Irvine. Upon his graduation in 1999, Nhan joined Silicon Storage Technology (SST) as a device...

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