Himani Kaushik | Lead Member Technical Staff
Siemens EDA
Himani Kaushik is a Verification IP Engineer at Siemens EDA, where she works on the development of advanced verification solutions for next generation interconnect technologies. She is currently involved in creating cutting-edge verification IP for UCIe, contributing to industry ready, high performance multi protocol designs.
Over her 5 year tenure at Siemens, she has played a key role in building robust verification infrastructures for UCIe, CXL and NVMe and has authored a conference paper at Flash Memory Summit as well as industry articles published in Semiconductor Engineering and the TechDesign Forum. Her past work reflects a strong focus on protocol innovation, interoperability, and modern chiplet based architectures.
She holds a Bachelor of Engineering (B.E.) degree from Netaji Subhas University of Technology (NSUT), completed in 2020.
Appearances:
Future of Memory and Storage - Day 3 @ 09:50
UCIe Manageability: From Concept to Algorithmic Realization
The introduction of UCIe manageability architecture has transformed the way chiplet-based System-in-Package (SiP) platforms are configured, controlled, and debugged. UCIe introduces a robust manageability framework, enabling structured configuration, communication, and monitoring between management entities embedded in chiplet. The flexibility of the manageability architecture enables the modeling of a management fabric with diverse topologies, including point-to-point, mesh, and daisy chain configurations. The diversity of topologies introduces non-trivial challenges in developing a robust verification solution for UCIe-based designs. This presentation aims to explore two critical challenge areas in depth: management discovery along with routing and security-enforced access mechanisms. Our goal is to identify strategic algorithms that simplify their implementation, ultimately streamlining the verification process for UCIe systems. The proposed algorithm ensures acyclic routing and avoids deadlocks in management topologies with redundant or cyclic links. It also smartly configures elements to restrict unauthorized access in security-sensitive scenarios.
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