Eyal Hamo | Sr Technologist & Reliability System Architect
Sandisk
With over 13 years of experience in Validation and Reliability Software Engineering, I have progressed from Validation Engineer to Product Owner and Reliability Architect. I focus on embedded storage systems and real-time applications in automotive and mobile platforms, with an emphasis on adaptive system-level reliability and data-driven validation methodologies. I specialize in validation architectures, system integration, and strategies that enable comprehensive product verification and performance optimization. As System and Reliability Architect at SanDisk, I lead validation and reliability strategies from kick-off to release, ensuring full test traceability while evolving qualification toward adaptive, analytics-driven frameworks. I lead reliability initiatives, optimize test infrastructures, enhance automated failure analysis systems, and support IATF and ASPICE audits. I integrate real-time monitoring frameworks and enable explainable ML-based anomaly detection while overseeing failure analysis across lifecycle phases. I’ve been granted seven patents in storage solutions. I hold a Bachelor’s in Software Engineering and a Master’s in Computer Science.
Appearances:
Future of Memory and Storage - Day 3 @ 13:35
Adaptive System-Level Reliability Validation for Flash Storage Devices
This presentation introduces Adaptive System-Level Reliability Testing (ASLRT), a dynamic validation framework for improving qualification efficiency in advanced flash storage systems. As memory scaling and firmware complexity increase, traditional pass/fail validation models fail to expose latent degradation mechanisms and condition-dependent firmware behaviors throughout the storage lifecycle. The proposed framework integrates continuous memory health monitoring (e.g., BER, FBC, and error trends), structured system-level corner-case checkers, and AI-driven unsupervised anomaly analytics to quantify device-level anomaly potential during validation. Rather than applying uniform lifecycle stressing, the framework adaptively steers validation depth, stress intensity, and sample allocation toward behaviorally marginal devices identified through system-level indicators. This closed-loop approach concentrates validation resources on marginal units while allowing nominal devices to complete qualification without unnecessary over-testing, enabling earlier exposure of degradation-related reliability risks and improved qualification efficiency without requiring silicon modification.
Created by
Terrapinn is proud to be a member of isla.
Working together to build sustainable events