Erich Haratsch | Senior Distinguished Engineer
Marvell Semiconductor

Erich Haratsch is Senior Distinguished Engineer at Marvell, where he leads architecture definition for SSD and storage controllers. Before Marvell, he worked at Seagate and LSI on SSD and HDD controllers across multiple product generations, and earlier at Agere Systems on HDD controller development. He began his career at AT&T and Lucent Bell Labs, contributing to Gigabit Ethernet over copper, optical communications, and the MPEG-4 video standard. Erich is the author of over 40 peer-reviewed journal and conference papers and holds more than 200 U.S. patents. He is a Senior Member of IEEE and holds MS and PhD degrees from the Technical University of Munich, Germany.

Appearances:

Future of Memory and Storage - Day 1 @ 10:05

Data Storage Innovations for Scalable AI Infrastructure

The exponential growth of AI model complexity and data volumes is reshaping the architecture of modern data centers. This session explores how innovations in storage technology—particularly SSDs—are enabling scalable, high-performance AI infrastructure. We examine the evolving storage demands across AI workflows, from training to inference, and highlight architectural considerations including memory and storage tiering, local and remote topologies, access path optimizations, and emerging SSD design strategies. Attendees will gain insights into how advanced data storage solutions are not only improving efficiency but also unlocking the capacity to train and deploy increasingly sophisticated AI models—driving the next wave of AI capabilities.

Erich Haratsch, Senior Distinguished Engineer, Marvell Semiconductor