Pitamber Shukla | Senior Manager, Solutions Architect
Microchip Technology

Pitamber Shukla is a seasoned Senior Manager and Solutions Architect at Microchip Technology, with a proven track record of driving innovation in the field of memory and storage solutions. With over 15 years of experience in the semiconductor industry, Dr. Shukla possesses a deep understanding of the latest technologies and trends shaping the future of memory and storage. Currently serving on the Flashtech Architecture team at Microchip Technology in San Jose, California, he sits at the intersection of NAND innovation and next-generation data center product strategy and defining future SSD controller direction and translating the most demanding platform requirements into architectural reality. Throughout his career, Dr. Shukla has been instrumental in developing cutting-edge solutions that have helped organizations optimize their data storage and memory systems for maximum efficiency and performance. His expertise lies in designing and implementing scalable and reliable architectures that meet the evolving needs of businesses in an increasingly data-driven world. His work has enabled the on-time launch of multiple enterprise and data center SSD products, with deep hands-on ownership of JEDEC-standard memory qualification. Dr. Shukla is known for his strategic thinking, technical acumen, and collaborative approach to problem-solving. He excels at bridging the gap between business requirements and technical capabilities and more broadly, between academic research and industrial application ensuring that solutions are not only innovative but also practical and cost-effective. He is equally committed to growing the next generation of engineers, mentoring cross-functional teams in machine learning techniques and best-in-class NAND quality practices across organizations and memory technologies. Recognized as an industry thought leader, Dr. Shukla is an active IEEE International Reliability Physics Symposium (IRPS) Memory Reliability Committee Member and serves as Workshop Session Chair for advanced packaging reliability challenges spanning AI/HPC, HBM, RF/5G, and 2.5D/3D packaging technologies. He is also a peer reviewer for IEEE Transactions on Electron Devices, IEEE Electron Device Letters, and Applied Physics Letters. His intellectual footprint is extraordinary: he is the inventor or co-inventor of 100+ U.S. patents (granted and pending), author of 9 peer-reviewed publications, contributor of 1 book chapter, and holder of 10 company-approved trade secrets a body of work that reflects both the breadth and depth of his contributions to memory and storage innovation. Dr. Shukla earned his PhD and MS in Electrical and Computer Engineering from the University of Illinois at Chicago. As a speaker at Future of Memory and Storage 2026, Dr. Shukla will share his insights on the latest advancements in memory and storage technologies, and how organizations can leverage these innovations to stay ahead in a rapidly changing digital landscape. Attendees can expect to gain valuable knowledge and actionable strategies to future-proof their memory and storage infrastructure under his guidance.